Connection-oriented Multicasting in Wormhole-switched Networks on Chip Zhonghai Lu, Bei Yin and Axel Jantsch Laboratory of Electronics and Computer Systems Royal Institute of Technology, Sweden fzhonghai,.s

Source URL: www.ece.rice.edu

A power efficient flit-admission scheme for wormhole-switched networks on chip Zhonghai Lu, Li Tong, Bei Yin and Axel Jantsch Laboratory of Electronics and Computer Systems Royal Institute of Technology, Sweden fzhonghai

Source URL: www.ece.rice.edu

Computer Science and Artificial Intelligence Laboratory Technical Report MIT-CSAIL-TRJuly 6, 2015

Source URL: www.cl.cam.ac.uk

• Cryptography
• Clipper chip
• Key escrow
• Crypto Wars
• Computer security
• Escrow
• Strong cryptography
• Encryption
• Secure communication
• National Security Agency
• Astro
• Key

Adaptive Online Testing for Efficient Hard Fault Detection Shantanu Gupta, Amin Ansari, Shuguang Feng and Scott Mahlke Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor {shangupt, ansary, shoe,

Source URL: cccp.eecs.umich.edu

Architectural Specialization for Inter-Iteration Loop Dependence Patterns Christopher Batten Computer Systems Laboratory School of Electrical and Computer Engineering Cornell University

Source URL: www.csl.cornell.edu

CACHE COHERENCE DIRECTORIES FOR SCALABLE MULTIPROCESSORS Richard Simoni Technical Report: CSL-TROctober 1992 Computer Systems Laboratory

Source URL: vlsiweb.stanford.edu

SHARED RECONFIGURABLE ARCHITECTURES FOR CMPS Matthew A. Watkins, Mark J. Cianchetti, and David H. Albonesi Computer Systems Laboratory Cornell University ABSTRACT This paper investigates reconfigurable architectures suit

Source URL: www.csl.cornell.edu

Load Instruction Characterization and Acceleration of the BioPerf Programs Paruj Ratanaworabhan and Martin Burtscher Computer Systems Laboratory, Cornell University {paruj, burtscher}@csl.cornell.edu today’s high-end m

Source URL: www.bioperf.org

DSDP5 User Guide — Software For Semidefinite Programming Steven J. Benson Mathematics and Computer Science Division Argonne National Laboratory Argonne, IL U.S.A.

Source URL: www.mcs.anl.gov

A Three-Tier Asynchronous FPGA David Fang, Song Peng, Chris LaFrieda, and Rajit Manohar ∗ Computer Systems Laboratory Electrical and Computer Engineering Cornell University Ithaca, NY 14853, U.S.A.

Source URL: vlsi.cornell.edu